A common relaxation oscillator, such as a relaxation voltage/current controlled oscillator, is an oscillator circuit as seen in FIG. 1. In FIG. 1, the relaxation oscillator 100 mainly uses current sources 110, 120 to alternate the charge and discharge of a capacitor 130 so as to produce an oscillating signal at a node 140. That is, the voltage at the node 140 is inputted to the two comparators 150 and 160 while independent reference voltages, namely VH and VL, are coupled to each of the remaining inputs of the comparators 150, 160. The outputs of each of the two comparators 150, 160 are respectively coupled to the inputs of a “Set-Reset type” flip-flop, that is, respectively to the S terminal and R terminal of the SR latch 170, which enables the SR latch 170 to output a control signal 180 from the Q terminal thereof for controlling the switch-over at node 140 between the power source 110 and the power source 120 and serving to alternately charge and discharge the capacitor 130.
As such, if the voltage at the node 140 is higher than the potential of the reference voltage VH, then the node 140 will coupled to the input terminal of the power source 120 for enabling the discharging of the capacitor 130; and if the voltage across the node 140 is lower than the potential of the low voltage VL, then the node 140 will coupled to the output terminal of the power source 110 for enabling the charging of the capacitor 130.
Please refer to FIG. 2 for an oscillating signal outputted from the relaxation oscillator 100. In FIG. 2, the voltage of an oscillating signal rises with the time during a charging process, and, as the voltage reaches a high trigger level (VH), a discharging process will be triggered and the voltage of the oscillating signal starts to drop with the time. However, since each component in the relaxation oscillator 100 has a so-called response time, particularly the comparator 150, 160, therefore the discharging process cannot be activated immediately when the voltage of the oscillating signal reaches the high trigger level (VH), and the charging continues for a period of time enabling the voltage of the oscillating signal to exceed the high trigger level (VH).
Therefore, the waveform of the oscillating signal outputted by the relaxation oscillator 100 will exceed the high trigger level (VH) and delay for some time before the waveform starts dropping. Similarly, it will drop beyond the low trigger level (VL) and delay for some time before the waveform starts rising.
Please refer to FIG. 3 for an enlarged diagram of a section of the waveform of an oscillating signal produced by a prior-art relaxation oscillator. In FIG. 3, the oscillating signal rises with a slope R1 and has a time delay td after passing the high trigger level (VH) before reaching its highest peak. Similarly, as the waveform falls from its maximum value at a slope which may or may not equal −R1, there is e another time delay td′ (which may or may not equal td) before it reaches the high trigger level (VH) again.
As the waveform of the oscillating signal with a time delay for the capacitor 130 in the relaxation oscillator 100 can average out some of the noises produced by the output of the comparators 150, 160, the phase noise and jitter of the oscillating signal is reduced. However, the existence of the time delay will make the frequency of the oscillating signal not directly proportional to the current supplied by the current sources 110, 120, which will adversely affect the modulation linearity.
Therefore, the oscillating signal produced by the relaxation oscillator cannot have a waveform capable of concurrently eliminating the phase noise and jitter and solving the modulation linearity problem.
In view of the description above, the present invention discloses a method and an apparatus for producing an oscillating signal to effectively overcome the shortcomings of the oscillating signal outputted by a prior-art relaxation oscillator that has phase noises, jitters and modulation linearity problem.